AWARD BIOS Code
■01 - Expand the Xgroup codes located in physical memory address 1000:0
■02 - Reserved
■03 - Initial Superio_Early_Init switch
■04 - Reserved
■05 - Blank out screen; Clear CMOS error flag
■06 - Reserved
■07 - Clear 8042 interface; Initialize 8042 self test
■08 - Test special keyboard controller for Winbond 977 series Super I/O chips; Enable keyboard interface
■09 - Reserved
■0A - Disable PS/2 mouse interface (optional); Auto detect ports for keyboard & mouse followed by a port & interface swap (optional); Reset keyboard for Winbond 977 series Super I/O chips
■0B - Reserved
■0C - Reserved
■0D - Reserved
■0E - Test F000h segment shadow to see whether it is read/write capable or not. If test fails, keep beeping the speaker
■0F - Reserved
■10 - Auto detect flash type to load appropriate flash read/write codes into the run time area in F000 for ESCD & DMI support
■11 - Reserved
■12 - Use walking 1's algorithm to check out interface in CMOS circuitry. Also set real time clock power status and then check for overrride
■13 - Reserved
■14 - Program chipset default values into chipset. Chipset default values are MODBINable by OEM customers
■15 - Reserved
■16 - Initial Early_Init_Onboard_Generator switch
■17 - Reserved
■18 - Detect CPU information including brand, SMI type (Cyrix or Intel) and CPU level (586 or 686)
■19 - Reserved
■1A - Reserved
■1B - Initial interrupts vector table. If no special specified, all H/W interrupts are directed to SPURIOUS_INT_HDLR & S/W interrupts to SPURIOUS_soft_HDLR
■1C - Reserved
■1D - Initial EARLY_PM_INIT switch
■1E - Reserved
■1F - Load keyboard matrix (notebook platform)
■20 - Reserved
■21 - HPM initialization (notebook platform)
■22 - Reserved
■23 - Check validity of RTC value; Load CMOS settings into BIOS stack. If CMOS checksum fails, use default value instead; Prepare BIOS resource map for PCI & PnP use. If ESCD is valid, take into consideration of the ESCD's legacy information; Onboard clock generator initialization. Disable respective clock resource to empty PCI & DIMM slots; Early PCI initialization - Enumerate PCI bus number, assign memory & I/O resource, search for a valid VGA device & VGA BIOS, and put it into C000:0
■24 - Reserved
■25 - Reserved
■26 - Reserved
■27 - Initialize INT 09 buffer
■28 - Reserved
■29 - Program CPU internal MTRR (P6 & PII) for 0-640K memory address; Initialize the APIC for Pentium class CPU; Program early chipset according to CMOS setup; Measure CPU speed; Invoke video BIOS
■2A - Reserved
■2B - Reserved
■2C - Reserved
■2D - Initialize multilanguage; Put information on screen display, including Award title, CPU type, CPU speed, etc...
■2E - Reserved
■2F - Reserved
■30 - Reserved
■31 - Reserved
■32 - Reserved
■33 - Reset keyboard except Winbond 977 series Super I/O chips
■34 - Reserved
■35 - Reserved
■36 - Reserved
■37 - Reserved
■38 - Reserved
■39 - Reserved
■3A - Reserved
■3B - Reserved
■3C - Test 8254
■3D - Reserved
■3E - Test 8259 interrupt mask bits for channel 1
■3F - Reserved
■40 - Test 9259 interrupt mask bits for channel 2
■41 - Reserved
■42 - Reserved
■43 - Test 8259 functionality
■44 - Reserved
■45 - Reserved
■46 - Reserved
■47 - Initialize EISA slot
■48 - Reserved
■49 - Calculate total memory by testing the last double last word of each 64K page; Program writes allocation for AMD K5 CPU
■4A - Reserved
■4B - Reserved
■4C - Reserved
■4D - Reserved
■4E - Program MTRR of M1 CPU; initialize L2 cache for P6 class CPU & program cacheable range; Initialize the APIC for P6 class CPU; On MP platform, adjust the cacheable range to smaller one in case the cacheable ranges between each CPU are not identical
■4F - reserved
■50 - Initialize USB
■51 - Reserved
■52 - Test all memory (clear all extended memory to 0)
■53 - Reserved
■54 - Reserved
■55 - Display number of processors (multi-processor platform)
■56 - Reserved
■57 - Display PnP logo; Early ISA PnP initialization and assign CSN to every ISA PnP device
■58 - Reserved
■59 - Initialize the combined Trend Anti-Virus code
■5A - Reserved
■5B - Show message for entering AWDFLASH.EXE from FDD (optional feature)
■5C - Reserved
■5D - Initialize Init_Onboard_Super_IO switch; Initialize Init_Onboard_AUDIO switch
■5E - Reserved
■5F - Reserved
■60 - Okay to enter Setup utility
■61 - Reserved
■62 - Reserved
■63 - Reserved
■64 - Reserved
■65 - Initialize PS/2 mouse
■66 - Reserved
■67 - Prepare memory size information for function call: INT 15h ax=E820h
■68 - Reserved
■69 - Turn on L2 cache
■6A - Reserved
■6B - Program chipset registers according to items described in Setup & Auto-Configuration table
■6C - Reserved
■6D - Assign resources to all ISA PnP devices; Auto assign ports to onboard COM ports if the corresponding item in Setup is set to 'AUTO'
■6E - Reserved
■6F - Initialize floppy controller; Setup floppy related fields in 40:hardware
■70 - Reserved
■71 - Reserved
■72 - Reserved
■73 - Enter AWDFLASH.EXE if: AWDFLASH.EXE is found in floppy dive and ALT+F2 is pressed
■74 - Reserved
■75 - Detect and install all IDE devices: HDD, LS120, ZIP, CDROM...
■76 - Reserved
■77 - Detect serial ports and parallel ports
■78 - Reserved
■79 - Reserved
■7A - Detect and install coprocessor
■7B - Reserved
■7C - Reserved
■7D - Reserved
■7E - Reserved
■7F - Switch back to text mode if full screen logo is supported: if errors occur, report errors & wait for keys, if no errors occur or F1 key is pressed continue - Clear EPA or customization logo
■80 - Reserved
■81 - Reserved
■82 - Call chipset power management hook: Recover the text fond used by EPA logo (not for full screen logo), If password is set, ask for password
■83 - Save all data in stack back to CMOS
■84 - Initialize ISA PnP boot devices
■85 - Final USB initialization; NET PC: Build SYSID structure; Switch screen back to text mode; Set up ACPI table at top of memory; Invoke ISA adapter ROM's; Assign IRQ's to PCI devices; Initialize APM; Clear noise of IRQ's
■86 - Reserved
■87 - Reserved
■88 - Reserved
■89 - Reserved
■90 - Reserved
■91 - Reserved
■92 - Reserved
■93 - Read HDD boot sector information for Trend Anti-Virus code
■94 - Enable L2 cache; Program boot up speed; Chipset final initialization; Power management final initialization; Clear screen and display summary table; Program K^ write allocation; Program P6 class write combining
■95 - Program daylight saving; Update keyboard LED and typematic rate
■96 - Build MP table; Build and update ESCD; Set CMOS century to 20h or 19h; Load CMOS time into DOS timer tick; Build MSIRQ routing table
■C0 - Early chipset initialization: Disable shadow RAM, L2 cache (socket 7 and below), program basic chipset registers
■C1 - Detect memory: Auto detection of DRAM size, type and ECC, auto detection of L2 cache (socket 7 and below)
■C3 - Expand compressed BIOS code to DRAM
■C5 - Call chipset hook to copy BIOS back to E000 & F000 shadow RAM
■CF - Test CMOS read/write functionality
■FF - Boot attempt (INT 19h)
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